In general, dynamic ON-resistance testing is a measure of charge trapping phenomena in GaN power transistors. This publication provides guidelines for testing dynamic ON-resistance of GaN lateral power transistor solutions. The test methods can be applied to the following:
a) GaN enhancement and depletion-mode discrete power devices [3];
b) GaN integrated power solutions;
c) the above in wafer and package levels.
The prescribed test methods can be used for device characterization, production testing, reliability evaluations and application assessments of GaN power conversion devices. This document is not intended to cover the underlying mechanisms of dynamic ON-resistance and its symbolic representation for product specifications.
